1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method for forming an isolating layer in a semiconductor device where formation of a recess in the isolating layer at a boundary with an active region during an STI (Shallow Trench Isolation) step is prevented to improve isolation.
2. Discussion of the Related Art
In general, an isolation layer is formed by field oxidation using an oxidation-resistant insulating layer pattern as a mask, or by STI, in which a trench is formed in a semiconductor substrate, and the trench is filled with an insulating material.
A conventional method for forming an isolating layer by STI will be explained with reference to the attached drawings. FIGS. 1A-1C illustrate sections showing the process steps of the conventional method for forming an isolating layer, and FIGS. 2A-2C illustrate sections and a micrograph showing a problem in the conventional method.
Referring to FIG. 1A, the conventional method for forming an isolating layer by STI begins with subjecting a semiconductor substrate 1 to thermal oxidation to form a thermal oxidation film 2 on a surface of the semiconductor substrate 1, and forming a nitride layer 3 on the thermal oxidation film 2. The nitride layer 3 is selectively etched by photolithography to remove the nitride layer 3 in isolating regions only. Exposed semiconductor substrate 1 is selectively etched using the patterned nitride layer 3 as a mask, forming trenches 4. As shown in FIG. 1B, an insulating material is deposited on an entire surface to fill the trenches 4 formed in isolating regions in the semiconductor substrate 1 and subjected to CMP (Chemical Mechanical Polishing), forming isolating layers 5. As shown in FIG. 1C, the nitride layer 3 and the thermal oxidation layer 2, which are used as masks in the trench formation, are then removed. Thus, in the conventional method for forming an isolating layer by using STI (which is widely used for improving isolation of devices), the isolating layer is formed by forming certain depths of trenches 4 in a semiconductor substrate and filling the trenches 4 with the insulating material.
However, the conventional method for forming an isolating layer by using STI has a problem in that a recess is formed in the insulating material layer filling the trenches 4 at a boundary with an active layer when the nitride pattern layer 3 is removed by wet etching after filling the trenches 4 with the insulating material. The recess, which becomes greater in an isotropic form in a cleaning process, causes formation of a thick portion in deposition of a material layer for a gate, such as doped polysilicon layer. The polysilicon layer with such a thicker portion should be overetched to form the gate, which causes a problem of device performance degradation resulting from damage to the substrate due to the overetch, which is difficult to prevent. In order to prevent the damage to the substrate, if the following steps are conducted without the overetch, namely, the steps shown in FIGS. 2A and 2B, a polysilicon layer 6 is deposited and etched to form a gate electrode layer. Portions of the polysilicon layer 6 remain as shown in FIG. 2B, and remain even after completion of the fabrication process as shown in FIG. 2C, causing shorts between gate lines, and resulting in a malfunction of the device.